How do I apply for the RTL Design Engineer position at advanced-micro-devices and track my application?

We provide a direct link to the official application portal. You can apply directly here . Additionally, you can easily track this and other applications by clicking the bookmark icon to save it to your YGI Kanban board .

What are the working arrangements and expected duration for the RTL Design Engineer role?

This position is a not disclosed, structured as a hybrid role, with an expected duration of 6 months.

What educational background or degree level is required for the RTL Design Engineer at advanced-micro-devices?

Candidates are generally expected to be holding or pursuing the following degree levels: Bachelor, Master.

Does advanced-micro-devices provide visa sponsorship or assistance for international applicants?

Regarding visa assistance and sponsorship for this role, the official status is currently listed as: Not disclosed.

RTL Design Engineer

advanced-micro-devices

Found 2 months ago

Location

Iasi, Romania

Duration (Months)

6 Months

Time

Not disclosed

Work Mode

Hybrid

Salary

Not disclosed

Visa Help

Not disclosed

Last Verified

2 months ago

Education

Bachelor
Master

Skills & Qualifications

Technical Skills

RTL
Verilog Hardware description Language
digital circuits
microprocessor/microcontroller
cache coherency protocols
simulation tools
TCL
Perl
Python
Linux commands
awk
sed
vim
regular expression
EDA tools
Synopsys
Cadence
Mentor Graphics
Xilinx

Soft Skills

passion for modern, complex processor architecture, digital design, and verification
team player
excellent communication skills
experience collaborating with other engineers located in different sites and time zones
strong analytical and problem-solving skills
willing to learn
ready to take on problems
Excellent communication skills
teamwork experience

Job Description

This role will focus on planning, micro architect, documenting, code and debug the RTL for new and existing features for AMD’s Infinity Data Fabric with focus on complexity, timing, area and power consumption efficiency.

Requirements

planning
micro architect
documenting
code and debug the RTL for new and existing features for AMD s Infinity Data Fabric with focus on complexity, timing, area and power consumption efficiency
passion for modern, complex processor architecture, digital design, and verification in general
team player who has excellent communication skills and experience collaborating with other engineers located in different sites and time zones
strong analytical and problem-solving skills and are willing to learn and ready to take on problems
Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be designed
Micro architect the feature, document it, estimate the effort and review the implementation with RTL lead and verification team
Execute the RTL code of the new feature at best quality and within the estimated duration
Debug and fix the RTL bugs, fix timing, area and power consumption issues
Debug support for SOC simulatation, emulation and actual silicon bring-up in lab
Analyze code coverage and detect holes in the verification environment
Excelent understanding of digital circuits and the ability to synthesize small circuitry
Excelent knowledge of Verilog Hardware description Language is highly desirable
Good understanding of how a microprocessor/microcontroller works and how such devices can be interfaced with various peripherals like memories and io devices
Good understanding on cache coherency protocols is desirable
Proficient in debugging firmware and RTL code using simulation tools
Exposure to leadership or mentorship is an asset
Excellent communication skills & teamwork experience is highly desirable
Exposure to scripting languages like TCL, Perl, Python is a plus
Exposure to basic Linux commands - awk, sed, vim & regular expression is a plus
Exposure to EDA tools, like the ones from Synopsys, Cadence, Mentor Graphics, Xilinx is a plus
Bachelors or Masters degree in computer engineering/Electrical Engineering

Software Engineering

Low Level System Software

Languages

English

Nice to Haves

Exposure to leadership or mentorship
scripting languages like TCL, Perl, Python
basic Linux commands - awk, sed, vim & regular expression
EDA tools, like the ones from Synopsys, Cadence, Mentor Graphics, Xilinx

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19Open Positions

Open Positions

19Open Positions

RTL Design Engineer

Education

Skills & Qualifications

Technical Skills

Soft Skills

Job Description

Requirements

Related Field

Related Subfield

Languages

Nice to Haves