How do I apply for the CPU Design Verification Engineer position at advanced-micro-devices and track my application?

We provide a direct link to the official application portal. You can apply directly here . Additionally, you can easily track this and other applications by clicking the bookmark icon to save it to your YGI Kanban board .

What are the working arrangements and expected duration for the CPU Design Verification Engineer role?

This position is a not disclosed, structured as a hybrid role, with an expected duration of 3 months.

What educational background or degree level is required for the CPU Design Verification Engineer at advanced-micro-devices?

Candidates are generally expected to be holding or pursuing the following degree levels: Bachelor, Master.

Does advanced-micro-devices provide visa sponsorship or assistance for international applicants?

Regarding visa assistance and sponsorship for this role, the official status is currently listed as: Not disclosed.

CPU Design Verification Engineer

advanced-micro-devices

Found 2 months ago

Location

Cambridge, United Kingdom

Duration (Months)

3 Months

Time

Not disclosed

Work Mode

Hybrid

Salary

Not disclosed

Visa Help

Not disclosed

Last Verified

2 months ago

Education

Bachelor
Master

Skills & Qualifications

Technical Skills

Microprocessor designs
RTL
SoC
HDL
logical design
simulation tools
debug tools
Verilog
System Verilog
assembly programming
CPU cache/memory subsystem verification

Soft Skills

technical expertise
sense of urgency
global teams
working relationships
stakeholders
programming skills
logic design
simulation skill set

Job Description

Provide technical expertise for executing the functional verification strategy for next-generation microprocessor designs. Maintain and enhance existing functional verification methodology. Improve existing infrastructure. Work on related projects and/or assignments as needed to meet team goals. Perform project definition, training, and documentation. Develop quality, timely, and cost-effective solutions independently. Interface with architects and TG/PG (Clock Gating/Power Gating) RTL/Designers.

Requirements

functional verification strategy
functional verification methodology
infrastructure
team goals
project definition
training
documentation
quality
timely
cost-effective solutions
architects
TG/PG (Clock Gating/Power Gating) RTL/Designers
dynamic environment
sense of urgency
global teams
working relationships
stakeholders
functional feature verification
high-speed Microprocessor designs
infrastructure
directed and random test suites
behavioral RTL level
SoC
Core
block hierarchies
environments
infrastructure
test plans
full chip
stand-alone block-level verification
debug capabilities
simulation tools
debug tools
programming skills
microprocessor's architecture
HDL(high definition language)/logical design
automated regression infrastructure setup
functional verification
high-speed microprocessor designs
design architecture
x86 assembly-based directed tests
random exercisers
microprocessor design
C/C++/Perl/Python/assembly programming
logic design
simulation skill set
simulation discrepancies
assertion responses
behavioral and gate-level logic models
coverage results
coverage holes

Software Engineering

Low Level System Software

Languages

English

Nice to Haves

CPU cache/memory subsystem verification

Apply Now

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