How do I apply for the Analog IC Design Engineer Intern position at Marvell Technology and track my application?

We provide a direct link to the official application portal. You can apply directly here . Additionally, you can easily track this and other applications by clicking the bookmark icon to save it to your YGI Kanban board .

What are the working arrangements and expected duration for the Analog IC Design Engineer Intern role?

This position is a full-time, structured as a not disclosed role, with an expected duration of 6 months.

What educational background or degree level is required for the Analog IC Design Engineer Intern at Marvell Technology?

Candidates are generally expected to be holding or pursuing the following degree levels: Bachelor, Master, PhD.

Does Marvell Technology provide visa sponsorship or assistance for international applicants?

Regarding visa assistance and sponsorship for this role, the official status is currently listed as: Not disclosed.

Analog IC Design Engineer Intern

Marvell Technology

Found 2 months ago

Location

Pavia, Italy

Duration (Months)

6 Months

Time

Full-time

Work Mode

Not disclosed

Salary

Not disclosed

Visa Help

Not disclosed

Last Verified

1 month ago

Education

Bachelor
Master
PhD

Skills & Qualifications

Technical Skills

CMOS analog design
RF design techniques
CMOS processes and fabrication
IC layout
Cadence
analog and high-speed layout

Soft Skills

Self-motivated personality
willing to learn exciting new technologies
able to work effectively within a talented group of individuals
Strong written and verbal communication skills

Job Description

We offer a 6-month contract, suitable also for the sponsorship of an industrial Master Thesis, at our office in Pavia (Italy) to work on Artificial Intelligence and Cloud data center applications Use the most advanced technology nodes (3nm FinFET and 2nm GAAFET). Design integrated circuits for electrical and electro-optical interfaces at 100+ Gb/s. Learn a variety of CAD tools, primarily Cadence, to design and simulate high performance analog circuits. Learn advanced techniques in analog and high-speed layout. Work in a team and collaborate with people for effective outcomes.

Requirements

Bachelor degree in Electronics Engineering (for the sponsorship of an Industrial Master Thesis) OR currently working on your Master or PhD thesis (for an extracurricular contract).
Academic knowledge of CMOS analog design.
Basics of RF design techniques are a plus.
Understanding of CMOS processes and fabrication.
Basic knowledge of IC layout.
Self-motivated personality, willing to learn exciting new technologies, and able to work effectively within a talented group of individuals.
Strong written and verbal communication skills.
Proficiency in both spoken and written Italian and English (B2 level or higher)

Software Engineering

Low Level System Software

Languages

Italian
English

Nice to Haves

Basics of RF design techniques are a plus.

Apply Now

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